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 IPD50N06S4L-08
OptiMOS(R)-T2 Power-Transistor
Product Summary V DS R DS(on),max ID 60 7.8 50 PG-TO252-3-11 V m A
Features * N-channel - Enhancement mode * AEC Q101 qualified * MSL1 up to 260C peak reflow * 175C operating temperature * Green Product (RoHS compliant) * 100% Avalanche tested
Type IPD50N06S4L-08
Package PG-TO252-3-11
Marking 4N06L08
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current1) Symbol ID Conditions T C=25C, V GS=10V T C=100C, V GS=10V2) Pulsed drain current2) Avalanche energy, single pulse2) Avalanche current, single pulse Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS I AS V GS P tot T j, T stg T C=25C I D=25A T C=25C Value 50 47 200 87 50 16 71 -55 ... +175 55/175/56 mJ A V W C - Unit A
Rev. 1.0
page 1
2009-03-24
IPD50N06S4L-08
Parameter
Symbol
Conditions min.
Values typ. max.
Unit
Thermal characteristics2) Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area3) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0V, I D= 1mA V GS(th) I DSS V DS=V GS, I D=35A V DS=60V, V GS=0V, T j=25C V DS=60V, V GS=0V, T j=125C2) Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=16V, V DS=0V V GS=4.5V, I D=25A V GS=10V, I D=50A 60 1.2 1.7 0.01 2.2 1 A V 2.1 62 40 K/W
-
5 9.0 6.3
100 100 13.5 7.8 nA m
Rev. 1.0
page 2
2009-03-24
IPD50N06S4L-08
Parameter
Symbol
Conditions min.
Values typ. max.
Unit
Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage IS I S,pulse V SD T C=25C V GS=0V, I F=50A, T j=25C V R=30V, I F=I S, di F/dt =100A/s 0.6 0.95 50 200 1.3 V A Q gs Q gd Qg V plateau V DD=48V, I D=50A, V GS=0 to 10V 13 5 49 3.6 19 10 64 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=30V, V GS=10V, I D=50A, R G=3.5 V GS=0V, V DS=25V, f =1MHz 3680 840 40 9 2 45 8 4780 1090 80 ns pF
Reverse recovery time2)
t rr
-
33
-
ns
Reverse recovery charge2)
1)
Q rr
-
32
-
nC
Current is limited by bondwire; with an R thJC = 2.1K/W the chip is able to carry 65A at 25C. Specified by design. Not subject to production test.
2) 3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air.
Rev. 1.0
page 3
2009-03-24
IPD50N06S4L-08
1 Power dissipation P tot = f(T C); V GS 6 V
2 Drain current I D = f(T C); V GS 6 V
80 70
60
50 60 40 50
P tot [W]
40 30
I D [A]
0 50 100 150 200
30
20 20 10 10 0 0 0 50 100 150 200
T C [C]
T C [C]
3 Safe operating area I D = f(V DS); T C = 25 C; D = 0 parameter: t p
1000
4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T
101
1 s
0.5
100
0.1
100
10 s
I D [A]
100 s
Z thJC [K/W]
0.05
10-1
0.01
1 ms
10 10-2
single pulse
1 0.1 1 10 100
10-3 10-6 10-5 10-4 10-3 10-2 10-1 100
V DS [V]
t p [s]
Rev. 1.0
page 4
2009-03-24
IPD50N06S4L-08
5 Typ. output characteristics I D = f(V DS); T j = 25 C parameter: V GS
200
10 V 6V
6 Typ. drain-source on-state resistance R DS(on) = f(I D); T j = 25 C parameter: V GS
20
4V 4.5 V 5V
18 160
5V
16 14
I D [A]
4.5 V
R DS(on) [m]
120
12 10
6V
80
4V
8 40
10 V
6 0 0 1 2 3 4 5 6 4 0 40 80 120 160 200
V DS [V]
I D [A]
7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j
200
-55 C 25 C
8 Typ. drain-source on-state resistance R DS(on) = f(T j); I D = 50 A; V GS = 10 V
13 12
160
175 C
11 10
R DS(on) [m]
0 1 2 3 4 5 6
120
I D [A]
9 8 7
80
40
6 5
0
4 -60 -20 20 60 100 140 180
V GS [V]
T j [C]
Rev. 1.0
page 5
2009-03-24
IPD50N06S4L-08
9 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D
2.5
10 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz
104
Ciss
2
350 A
C [pF]
103
Coss
V GS(th) [V]
1.5
35 A
1 102
0.5
Crss
0 -60 -20 20 60 100 140 180
101 0 5 10 15 20 25 30
T j [C]
V DS [V]
11 Typical forward diode characteristicis IF = f(VSD) parameter: T j
103
12 Avalanche characteristics I A S= f(t AV) parameter: T j(start)
100
25 C 100 C
10
2
10
150 C
101
I AV [A]
175 C 25 C
I F [A]
1
100 0 0.2 0.4 0.6 0.8 1 1.2 1.4
0.1 0.1 1 10 100 1000
V SD [V]
t AV [s]
Rev. 1.0
page 6
2009-03-24
IPD50N06S4L-08
13 Avalanche energy E AS = f(T j); I D = 25 A
14 Drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA
100
66
64 75
50
V BR(DSS) [V]
62
E AS [mJ]
60
25 58
0 25 75 125 175
56 -55 -15 25 65 105 145
T j [C]
T j [C]
15 Typ. gate charge V GS = f(Q gate); I D = 50 A pulsed parameter: V DD
10 9 8 7 6
12 V 48 V
16 Gate charge waveforms
V GS
Qg
V GS [V]
5 4 3 2
V g s(th)
Q g (th)
1 0 0 10 20 30 40 50
Q sw Q gs Q gd
Q gate
Q gate [nC]
Rev. 1.0
page 7
2009-03-24
IPD50N06S4L-08
Published by Infineon Technologies AG 81726 Munich, Germany
(c) Infineon Technologies AG 2009
All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2009-03-24
IPD50N06S4L-08
Revision History Version Revision 1.0 Date Changes 24.03.2009 Final data sheet
Rev. 1.0
page 9
2009-03-24


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